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Hybrid use of registers
1. one **hybrid** solution of register usage After the discussion with Dmitry, we may want to propose one hybrid solution of register usage. 1) Following the x86 implementation, we define REG0/1/2 to be the scratch registers. Clever tricks are utilized in x86 implementation for better register allocation. Note that we define REG0/1/2 as x8/9/10. One reason is that R0 and FCARG1 should be distinguished. 2) Temporary registers are also reserved(i.e. they are excluded from the candidates of register allocator), and they would be used due to the different addressing modes in AArch64. 2. update the 'make clean' target. 3. remove the unnecessary AArch64 related macros in zend_jit_internal.h. [ci skip] Change-Id: I627157b88b2344530d705751eb7f73a223ed83e5 CustomizedGitHooks: yes
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@@ -117,6 +117,7 @@ clean:
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find . -name .libs -a -type d|xargs rm -rf
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rm -f libphp.la $(SAPI_CLI_PATH) $(SAPI_CGI_PATH) $(SAPI_LITESPEED_PATH) $(SAPI_FPM_PATH) $(OVERALL_TARGET) modules/* libs/*
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rm -f ext/opcache/jit/zend_jit_x86.c
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rm -f ext/opcache/jit/zend_jit_arm64.c
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distclean: clean
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rm -f Makefile config.cache config.log config.status Makefile.objects Makefile.fragments libtool main/php_config.h main/internal_functions_cli.c main/internal_functions.c Zend/zend_dtrace_gen.h Zend/zend_dtrace_gen.h.bak Zend/zend_config.h
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@@ -125,8 +126,6 @@ distclean: clean
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rm -f scripts/man1/phpize.1 scripts/php-config scripts/man1/php-config.1 sapi/cli/php.1 sapi/cgi/php-cgi.1 sapi/phpdbg/phpdbg.1 ext/phar/phar.1 ext/phar/phar.phar.1
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rm -f sapi/fpm/php-fpm.conf sapi/fpm/init.d.php-fpm sapi/fpm/php-fpm.service sapi/fpm/php-fpm.8 sapi/fpm/status.html
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rm -f ext/phar/phar.phar ext/phar/phar.php
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rm -f ext/opcache/jit/zend_jit_x86.c
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rm -f ext/opcache/jit/zend_jit_arm64.c
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if test "$(srcdir)" != "$(builddir)"; then \
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rm -f ext/phar/phar/phar.inc; \
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fi
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+450
-240
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Load diff
@@ -105,28 +105,40 @@ typedef enum _zend_reg {
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} zend_reg;
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typedef struct _zend_jit_registers_buf {
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uint64_t gpr[32]; /* general purpose integer register */
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double fpr[32]; /* floating point registers */
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uint64_t gpr[32]; /* general purpose integer register */
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double fpr[32]; /* floating point registers */
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} zend_jit_registers_buf;
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#define ZREG_RSP ZREG_X31
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#define ZREG_RLR ZREG_X30
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#define ZREG_RFP ZREG_X29
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#define ZREG_RPR ZREG_X18
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#define ZREG_FP ZREG_X27
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#define ZREG_IP ZREG_X28
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#define ZREG_RX ZREG_IP
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#define ZREG_REG0 ZREG_X8
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#define ZREG_REG1 ZREG_X9
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#define ZREG_REG2 ZREG_X10
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#define ZREG_FPR0 ZREG_V0
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#define ZREG_FPR1 ZREG_V1
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#define ZREG_TMP1 ZREG_X11
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#define ZREG_TMP2 ZREG_X12
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#define ZREG_TMP3 ZREG_X13
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#define ZREG_TMP4 ZREG_X14
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#define ZREG_COPY ZREG_REG0
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#define ZREG_FIRST_FPR ZREG_V0
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#define ZREG_RSP ZREG_X31
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#define ZREG_RLR ZREG_X30
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#define ZREG_RFP ZREG_X29
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#define ZREG_RPR ZREG_X18
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# define ZREG_FP ZREG_X27
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# define ZREG_IP ZREG_X28
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# define ZREG_RX ZREG_IP
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typedef uint64_t zend_regset;
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# define ZEND_REGSET_FIXED \
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(ZEND_REGSET(ZREG_RSP) | ZEND_REGSET(ZREG_RLR) | ZEND_REGSET(ZREG_RFP) | \
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ZEND_REGSET(ZREG_RPR) | ZEND_REGSET(ZREG_FP) | ZEND_REGSET(ZREG_IP) | \
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ZEND_REGSET_INTERVAL(ZREG_X8, ZREG_X11) | \
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ZEND_REGSET_INTERVAL(ZREG_V16, ZREG_V17))
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ZEND_REGSET_INTERVAL(ZREG_TMP1, ZREG_TMP4))
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# define ZEND_REGSET_GP \
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ZEND_REGSET_DIFFERENCE(ZEND_REGSET_INTERVAL(ZREG_X0, ZREG_X30), ZEND_REGSET_FIXED)
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# define ZEND_REGSET_FP \
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@@ -137,6 +149,7 @@ typedef uint64_t zend_regset;
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# define ZEND_REGSET_PRESERVED \
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(ZEND_REGSET_INTERVAL(ZREG_X19, ZREG_X28) | ZEND_REGSET_INTERVAL(ZREG_V8, ZREG_V15))
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#define ZEND_REGSET_LOW_PRIORITY ZEND_REGSET_EMPTY
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#define ZEND_REGSET_LOW_PRIORITY \
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(ZEND_REGSET(ZREG_REG0) | ZEND_REGSET(ZREG_REG1) | ZEND_REGSET(ZREG_FPR0) | ZEND_REGSET(ZREG_FPR1))
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#endif /* ZEND_JIT_ARM64_H */
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@@ -64,11 +64,7 @@
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#define ZEND_REGSET_DIFFERENCE(set1, set2) \
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((set1) & ~(set2))
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#if defined (__aarch64__)
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# define ZEND_REGSET_FIRST(set) ((zend_reg)__builtin_ctzll(set))
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# define ZEND_REGSET_SECOND(set) ((zend_reg)__builtin_ctzll(set ^ (1ull << ZEND_REGSET_FIRST(set))))
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# define ZEND_REGSET_LAST(set) ((zend_reg)(__builtin_clzll(set)^63))
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#elif !defined(_WIN32)
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#if !defined(_WIN32)
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# if (ZREG_NUM <= 32)
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# define ZEND_REGSET_FIRST(set) ((zend_reg)__builtin_ctz(set))
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# define ZEND_REGSET_LAST(set) ((zend_reg)(__builtin_clz(set)^31))
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@@ -76,7 +72,7 @@
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# define ZEND_REGSET_FIRST(set) ((zend_reg)__builtin_ctzll(set))
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# define ZEND_REGSET_LAST(set) ((zend_reg)(__builtin_clzll(set)^63))
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# else
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# errir "Too many registers"
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# error "Too many registers"
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# endif
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#else
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# include <intrin.h>
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@@ -95,7 +91,7 @@ uint32_t __inline __zend_jit_clz(uint32_t value) {
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return 32;
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}
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# define ZEND_REGSET_FIRST(set) ((zend_reg)__zend_jit_ctz(set))
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# define ZEND_REGSET_LAST(set) ((zend_reg)(__zend_jit_clz(set)^31)))
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# define ZEND_REGSET_LAST(set) ((zend_reg)(__zend_jit_clz(set)^31))
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#endif
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#define ZEND_REGSET_FOREACH(set, reg) \
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@@ -6947,7 +6947,7 @@ static void zend_jit_dump_exit_info(zend_jit_trace_info *t)
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} else if (STACK_REG(stack, j) == ZREG_ZVAL_COPY_GPR0) {
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fprintf(stderr, " ");
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zend_dump_var(op_array, (j < op_array->last_var) ? IS_CV : 0, j);
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fprintf(stderr, ":unknown(zval_copy(%s))", zend_reg_name[0]);
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fprintf(stderr, ":unknown(zval_copy(%s))", zend_reg_name[ZREG_COPY]);
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}
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}
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fprintf(stderr, "\n");
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@@ -7478,7 +7478,7 @@ int ZEND_FASTCALL zend_jit_trace_exit(uint32_t exit_num, zend_jit_registers_buf
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} else if (STACK_REG(stack, i) == ZREG_ZVAL_TRY_ADDREF) {
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Z_TRY_ADDREF_P(EX_VAR_NUM(i));
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} else if (STACK_REG(stack, i) == ZREG_ZVAL_COPY_GPR0) {
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zval *val = (zval*)regs->gpr[0];
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zval *val = (zval*)regs->gpr[ZREG_COPY];
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if (UNEXPECTED(Z_TYPE_P(val) == IS_UNDEF)) {
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/* Undefined array index or property */
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@@ -88,6 +88,7 @@ typedef struct _zend_jit_registers_buf {
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} zend_jit_registers_buf;
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#define ZREG_FIRST_FPR ZREG_XMM0
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#define ZREG_COPY ZREG_R0
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#define ZREG_RAX ZREG_R0
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#define ZREG_RCX ZREG_R1
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